/* Verilog netlist generated by SCUBA Diamond (64-bit) 3.7.1.502 */ /* Module Version: 5.8 */ /* C:\lscc\diamond\3.7_x64\ispfpga\bin\nt64\scuba.exe -w -n serialfifo2k -lang verilog -synth synplify -bus_exp 7 -bb -arch xo2c00 -type ebfifo -depth 2048 -width 8 -rwidth 8 -no_enable -pe 10 -pf 508 */ /* Mon Mar 27 22:48:10 2017 */ `timescale 1 ns / 1 ps module serialfifo2k (Data, WrClock, RdClock, WrEn, RdEn, Reset, RPReset, Q, Empty, Full, AlmostEmpty, AlmostFull)/* synthesis NGD_DRC_MASK=1 */; input wire [7:0] Data; input wire WrClock; input wire RdClock; input wire WrEn; input wire RdEn; input wire Reset; input wire RPReset; output wire [7:0] Q; output wire Empty; output wire Full; output wire AlmostEmpty; output wire AlmostFull; wire scuba_vhi; wire Empty_int; wire Full_int; wire scuba_vlo; defparam serialfifo2k_0_1.FULLPOINTER1 = "0b01111111111100" ; defparam serialfifo2k_0_1.FULLPOINTER = "0b10000000000000" ; defparam serialfifo2k_0_1.AFPOINTER1 = "0b00011111101100" ; defparam serialfifo2k_0_1.AFPOINTER = "0b00011111110000" ; defparam serialfifo2k_0_1.AEPOINTER1 = "0b00000000101100" ; defparam serialfifo2k_0_1.AEPOINTER = "0b00000000101000" ; defparam serialfifo2k_0_1.ASYNC_RESET_RELEASE = "SYNC" ; defparam serialfifo2k_0_1.GSR = "DISABLED" ; defparam serialfifo2k_0_1.RESETMODE = "ASYNC" ; defparam serialfifo2k_0_1.REGMODE = "NOREG" ; defparam serialfifo2k_0_1.CSDECODE_R = "0b11" ; defparam serialfifo2k_0_1.CSDECODE_W = "0b11" ; defparam serialfifo2k_0_1.DATA_WIDTH_R = 4 ; defparam serialfifo2k_0_1.DATA_WIDTH_W = 4 ; FIFO8KB serialfifo2k_0_1 (.DI0(Data[0]), .DI1(Data[1]), .DI2(Data[2]), .DI3(Data[3]), .DI4(scuba_vlo), .DI5(scuba_vlo), .DI6(scuba_vlo), .DI7(scuba_vlo), .DI8(scuba_vlo), .DI9(scuba_vlo), .DI10(scuba_vlo), .DI11(scuba_vlo), .DI12(scuba_vlo), .DI13(scuba_vlo), .DI14(scuba_vlo), .DI15(scuba_vlo), .DI16(scuba_vlo), .DI17(scuba_vlo), .CSW0(scuba_vhi), .CSW1(scuba_vhi), .CSR0(scuba_vhi), .CSR1(scuba_vhi), .FULLI(Full_int), .EMPTYI(Empty_int), .WE(WrEn), .RE(RdEn), .ORE(RdEn), .CLKW(WrClock), .CLKR(RdClock), .RST(Reset), .RPRST(RPReset), .DO0(Q[0]), .DO1(Q[1]), .DO2(Q[2]), .DO3(Q[3]), .DO4(), .DO5(), .DO6(), .DO7(), .DO8(), .DO9(), .DO10(), .DO11(), .DO12(), .DO13(), .DO14(), .DO15(), .DO16(), .DO17(), .EF(Empty_int), .AEF(AlmostEmpty), .AFF(AlmostFull), .FF(Full_int)); VHI scuba_vhi_inst (.Z(scuba_vhi)); VLO scuba_vlo_inst (.Z(scuba_vlo)); defparam serialfifo2k_1_0.FULLPOINTER1 = "0b00000000000000" ; defparam serialfifo2k_1_0.FULLPOINTER = "0b11111111111100" ; defparam serialfifo2k_1_0.AFPOINTER1 = "0b00000000000000" ; defparam serialfifo2k_1_0.AFPOINTER = "0b11111111111100" ; defparam serialfifo2k_1_0.AEPOINTER1 = "0b00000000000000" ; defparam serialfifo2k_1_0.AEPOINTER = "0b11111111111100" ; defparam serialfifo2k_1_0.ASYNC_RESET_RELEASE = "SYNC" ; defparam serialfifo2k_1_0.GSR = "DISABLED" ; defparam serialfifo2k_1_0.RESETMODE = "ASYNC" ; defparam serialfifo2k_1_0.REGMODE = "NOREG" ; defparam serialfifo2k_1_0.CSDECODE_R = "0b11" ; defparam serialfifo2k_1_0.CSDECODE_W = "0b11" ; defparam serialfifo2k_1_0.DATA_WIDTH_R = 4 ; defparam serialfifo2k_1_0.DATA_WIDTH_W = 4 ; FIFO8KB serialfifo2k_1_0 (.DI0(Data[4]), .DI1(Data[5]), .DI2(Data[6]), .DI3(Data[7]), .DI4(scuba_vlo), .DI5(scuba_vlo), .DI6(scuba_vlo), .DI7(scuba_vlo), .DI8(scuba_vlo), .DI9(scuba_vlo), .DI10(scuba_vlo), .DI11(scuba_vlo), .DI12(scuba_vlo), .DI13(scuba_vlo), .DI14(scuba_vlo), .DI15(scuba_vlo), .DI16(scuba_vlo), .DI17(scuba_vlo), .CSW0(scuba_vhi), .CSW1(scuba_vhi), .CSR0(scuba_vhi), .CSR1(scuba_vhi), .FULLI(Full_int), .EMPTYI(Empty_int), .WE(WrEn), .RE(RdEn), .ORE(RdEn), .CLKW(WrClock), .CLKR(RdClock), .RST(Reset), .RPRST(RPReset), .DO0(Q[4]), .DO1(Q[5]), .DO2(Q[6]), .DO3(Q[7]), .DO4(), .DO5(), .DO6(), .DO7(), .DO8(), .DO9(), .DO10(), .DO11(), .DO12(), .DO13(), .DO14(), .DO15(), .DO16(), .DO17(), .EF(), .AEF(), .AFF(), .FF()); assign Empty = Empty_int; assign Full = Full_int; // exemplar begin // exemplar end endmodule