OUTPUT_FORMAT("elf32-lm8")
OUTPUT_ARCH("lm8")
ENTRY(_reset)

MEMORY
{
	/* 
	 * Modify the length to reflect size of PROM in bytes.
	 * For the purpose of toolchain munipulation, each instruction
	 * is stored in 3 bytes.  This will be translated into a single
	 * 18-bit EBR address when synthesized.
	 */
	FLASH   (rx)   : ORIGIN = 0, LENGTH = 3072

	/*
	 * Modify the length to reflect size of Scratchpad (in bytes)
	 */
	SCRATCH (rw!x) : ORIGIN = 0, LENGTH = 1024
}

SECTIONS
{
	/*
	 * The LM8 vector table is very simple.  The first
	 * instruction at address 0 is the external interrupt
	 * vector.  It should contain either an unconditional
	 * branch or iret.  The reset vector is add address
	 * 1.
	 */

	.text :
	{
		KEEP(*(.vectors))
		*(.text)
		*(.text*)

	} > FLASH

	.data : AT (LOADADDR(.text) + SIZEOF(.text))
	{
		PROVIDE (__data_start = .);

		/*
		 * The first 4 bytes are reserved to hold the
		 * previous stack pointer when entering the ISR
		 */

		LONG(0)

		*(.sp_imm)

		*(.data)
		*(.data*)
		*(.gnu.linkonce.d.*)

		*(.sdata)
		*(.sdata*)
		*(.gnu.linkonce.s.*)

		/*
		 * Welcome to pure Harvard
		 */

		*(.rodata)
		*(.rodata*)
		*(.gnu.linkonce.r.*)

		. = ALIGN(2);

		PROVIDE (__data_end = .);

	} > SCRATCH

	.bss : AT (LOADADDR(.text) + SIZEOF(.text) + SIZEOF(.data))
	{ 
		PROVIDE (__bss_start = .);

		*(.dynsbss)
		*(.sbss)
		*(.sbss*)
		*(.gnu.linkonce.sb.*)
	     *(.scommon)

		*(.dynbss)
		*(.bss)
		*(.bss*)
		*(.gnu.linkonce.b.*)
		*(COMMON)

		. = ALIGN(2);

		PROVIDE (__bss_end = .);

	} > SCRATCH

	.irq_stack : AT (LOADADDR(.text) + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.bss))
	{
		*(.irq_stack)

	} > SCRATCH

	. = ALIGN (2);

	PROVIDE(__stack = ORIGIN (SCRATCH) + LENGTH (SCRATCH) - 4);

	/DISCARD/ :
	{
		*(.exitcall.exit)
		*(.discard)
		*(.debug*)
		*(.stab*)
	}
}