SCUBA, Version Diamond_3.1_Production (93)
Tue May 13 16:30:01 2014

Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp.   All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc.  All rights reserved.
Copyright (c) 2001 Agere Systems   All rights reserved.
Copyright (c) 2002-2014 Lattice Semiconductor Corporation,  All rights reserved.

    Issued command   : C:\lscc\diamond\3.1\ispfpga\bin\nt\scuba.exe -w -n efb -lang verilog -synth synplify -bus_exp 7 -bb -type efb -arch xo2c00 -freq 40 -spi -spi_mode Both -spi_freq 13.33 -spi_cs 1 -ufm -ufm_ebr 2026 -mem_size 20 -ufm_0 -wb -dev 7000 
    Circuit name     : efb
    Module type      : efb
    Module Version   : 1.2
    Ports            : 
	Inputs       : wb_clk_i, wb_rst_i, wb_cyc_i, wb_stb_i, wb_we_i, wb_adr_i[7:0], wb_dat_i[7:0], spi_scsn, ufm_sn
	Outputs      : wb_dat_o[7:0], wb_ack_o, spi_csn[0:0], wbc_ufm_irq
	Inouts       : spi_clk, spi_miso, spi_mosi
    I/O buffer       : not inserted
    EDIF output      : efb.edn
    Verilog output   : efb.v
    Verilog template : efb_tmpl.v
    Verilog purpose  : for synthesis and simulation
    Bus notation     : big endian
    Report output    : efb.srp
    Element Usage    :
             BB : 3
            EFB : 1
    Estimated Resource Usage: